Variable frequency, variable wave form inverter



N. w. MAPHAM VARIABLE FREQUENCY, VARIABLE WAVE FORM INVERTER OriginalFiled Dec. 31, 1962 2 Sheets-Sheet 1 GATING SOURCE fidu- 10 I38 95 IINVENTOR NEVILLE w. MAPHAM SIGNAL DELAY BY CONTROL SOURCE CIRCUIT K/MM1a22 ATTORNEY y 1967 N. w. MAPHAM 3,319,147

VARIABLE FREQUENCY, VARIABLE WAVE FORM INVERTER Original Filed Dec. 31,1962 2 Sheets-Sheet 2 FBGA I40 F|G.6 I I I42 {I48 I HIGH FREQUENCYCONTROLLED LOW PASS OUTPUT GENERATOR RECTIFIER FILTER r DELAY SIGNALsssmu. SOURCE GENERATOR EEQJEP HGT FIGB

INVENTOR.

' NEVILLE w. MAPHAM ATTORNEY United States Patent 3,319,147 VARIABLEFREQUENCY, VARIABLE WAVE FORM INVERTER Neville W. Mapharn, Jordan, N.Y.,assignor to General Electric Company, a corporation of New YorkContinuation of application Ser. No. 248,706, Dec. 31, 1962. Thisapplication Apr. 20, 1966, Ser. No. 549,749 20 Claims. (Cl. 321-6) Thisinvention relates to inverters. More particularly, it relates to animproved static inverter and frequency converter circuit.

This application is a full continuation of the application Ser. No.248,706 entitled, A Variable Frequency, Variable Wave Form Inverterfiled Dec. 31, 1962.

With the development of static inverters utilizing gate controlledrectifiers as the power switching elements therein, those producingsquare wave outputs have been the most common form in use in view of theease with which such square wave power outputs can be produced. However,square waves present the disadvantage of containing a great multiplicityof harmonics which cause heating in many situations such as when theyare used with motors, transformers, and the like. Of course, harmonicscan be filtered out to provide relatively pure sinusoidal power outputsbut filters for accomplishing this purpose are heavy and expensive.Alternatively, sine wave static inverters can be used but, with them,the resonating inductors and capacitors which have to be provided arealso heavy and expensive.

In addition to heaviness and expensiveness, known square wave and sinewave inverters both present many problems associated with voltageregulation. In the square wave type inverter, output voltage regulationis generally effected by some form of pulse width modulation. Suchmodulation requires additional, complex circuitry. Similarly, outputvoltage regulation of sine wave inverters may require complex voltagesensing arrangements, saturable devices and the like. Also,short-circuit protection and open circuit operation is difiicult toobtain with presently known inverter circuits.

Accordingly, it is an important object of this invention to provide animproved static inverter which is substantially both short-circuit andopen-circuit proof.

It is a further object to provide an inverter in accord ance with thepreceding object wherein direct current power to alternating currentpower conversion is eificient and wherein a substantial saving in weightand cost is effected as compared to known inverters.

It is another object to provide an inverter in accordance with thepreceding objects in which output voltage regulation is readilyaccomplished in a simple manner.

It is still another object to provide an inverter in accordance with thepreceding objects which is capable of producing an output, both of whosefrequency and output waveform are readily varied.

It is yet another object to provide an inverter in accordance with thepreceding objects which is capable of functioning as a DC. to DC.converter.

Generally speaking and in accordance with the principles of theinvention, there is provided a circuit for converting the output of apotential source to an alternating current output having a chosen rangeof frequencies comprising first switching means adapted to be coupled tothe source to produce an alternating current output having a frequencygreater than the highest frequency of the range. There are also providedsecond switching means and mean for applying the output of the firstswitching means to the second switching means to produce an outputhaving the chosen range of frequencies.

Essentially, a directing conception of the invention is the conversionof a unidirectional potential to a first compara- 3,319,147 Patented May9, 1967 tively high frequency alternating current potential and thenconverting such first alternating current potential to a secondrelatively low frequency alternating current potential, the secondalternating current potential having the desired frequency. Theinvention contemplates the conversion of the potential from a primarypotential source which may be a unidirectional or alternating currentpotential source. If it is an alternating current potential source, theconversion of the output of either a single phase or multiphase outputis contemplated. The converting portion of the inventive circuit may beof the series or parallel type and the switching means may comprisecircuit elements such as gate controlled rectifiers, transistors,Shockley diodes or other suitable switching elements. The alternatingcurrent voltages for effecting the switching of the switching elementsfrom their conductive to their non-conductive states may be square,sinusoidal or other suitable Wave configurations.

The inventive circuit may include a suitable filter for converting theoutputs of the switching means to a relatively pure sinusoidal form. Thetiming for changing the switching means elements from one state to theopposite state may be phase controlled or controlled with other suitablearrangements such as by logic circuitry and the like. To provide foroutput voltage control, feedback may be provided which effects outputvoltage regulation in accordance with the deviation of the value of theoutput voltage from a desired value.

Also, in accordance with the principles of the invention in a specificembodiment thereof, there is provided a circuit for converting theoutput of a unidirectional potential source such as a direct currentpotential or the rectified output of an alternating current potentialsource of substantially any frequency to an alternating current poweroutput of a chosen range of frequencies comprising a series arrangementadapted to be connected across the source of a pair of gate controlledrectifiers and an inductor disposed therebetween, a series combinationof a pair of capacitors connected across the source, a load impedance incircuit with the junction of the capacitors and an intermediate point onthe inductor and a third capacitor in shunt with the load impedance.There are further included in the circuit, first controlling means forpreventing the output voltage from exceeding a chosen level and secondcontrolling means for limiting the voltage applied to the gatecontrolled rectifiers.

Further, in accordance with the invention, there is provided a circuitfor converting the output of a unidirectional potential source such as adirect current potential source or the rectified output of analternating current potential source of a first frequency to analternating current power output having a second frequency comprising aseries arrangement connected across the source of a first pair of gatecontrolled rectifiers and an inductor disposed therebetween, a seriescombination of a pair of capacitors connected across the source, and atransformer comprising a primary winding connected bet-ween the junctionof the capacitors and an intermediate point of the inductor and aplurality of secondary windings. There are further provided a pair ofdiodes respectively in circuit with the source and the terminals of afirst of the secondary windings, the series arrangement connected acrossthe source of a second of the secondary windings and a third diode, anda third capacitor in shunt with the primary winding. A first signalgenerating means having a frequency substantially greater than theaforesaid second frequency is included for producing gating signals tothe first pair of gate controlled rectifiers. The circuit furtherincludes a second pair of gate controlled rectifiers poled in onedirection and a third pair of gate controlled rectifiers poled in theopposite direction. A third of the secondary windings is utilized toapply the combined outputs of the gate controlled rectifiers comprisingsaid first pair to a gate controlled rectifier of each of the second andthird pairs in the opposite polarity. There are also provided secondsignal generating means controlled by a signal source having the secondfrequency, the alternate half cycles of the output of the second signalsource controlling pulse trains applied as gating pulses to the secondand third pairs of gate controlled rectifiers respectively.

The novel features, which are believed to be characteristic of thisinvention are set forth with particularity in the appended claims. Theinvention itself, however, both as to its organization and method ofoperation, together with further objects and advantages thereof, maybest be understood by reference to the following description when takenin connection with the accompanying drawings.

In the drawings, FIG. 1 is a schematic depiction of an illustrativeembodiment of a circuit in accordance with the principles of theinvention;

FIGS. 2 to 5 are voltage waveforms of output which are obtainable withthe circuit of FIG. 1;

FIG. 6 is an embodiment of an arrangement in accordance with theprinciples of the invention which functions as a linear amplifier; and

FIGS. 7 and 8 are waveforms of outputs obtainable with the arrangementof FIG. 6.

Referring now to FIG. 1, a unidirectional potential source,schematically depicted as a battery 10, the output of which is convertedto alternating current power, has connected thereacross the seriesarrangement of capacitors 12 and 14 and the series arrangement of theanode to cathode path of a silicon controlled rectifier 16, an inductor18 and the anode to cathode path of a silicon controlled rectifier 20.Connected between the junction 13 of capacitors 12 and 14 and themidpoint of inductor 18 is the parallel arrangement of the primarywinding 24 of a transformer 22 and a capacitor 32. The terminals of onesecondary winding 26 of transformer 22 are returned to the negativeterminal of source through the cathode to anode paths of respectivediodes 34 and 36, secondary winding 26 being center-tapped to thepositive terminal of source 10. A secondary winding 28 of transformer 22is utilized 'in developing the output power of the circuit which isapplied to a load as will be further explained hereinbelow.

. A winding 30 is included which is in transformer rel-ationship withinductor 18, one terminal of winding 30 being returned to the positiveterminal of source 19 through the anode to cathode path of a diode 38,the other terminal of winding 30 being connected to the negativeterminal of source 10. Silicon controlled rectifiers 16 and 20 arealternately gated into conductivity by the output of a gating source 40which may suitably be a pulse generator such as a unijunction transistorrelaxation oscillator, a multivibrator or like circuit. Primary winding44 and secondary windings 46 and 48 are windings of a transformer 42through which silicon controlled rectifiers 16 and 20 are gated intoconductivity by the output of gating source 40. It is seen by thepolarity dot designations of secondary windings 46 and 48 that siliconcontrolled rectifiers 16 and 20 are alternately gated into conductivity.

In considering the operation of the circuit of FIG. 1 as described thusfar, when the output from gating source 40 renders silicon controlledrectifier 16 conductive, the current i drive-s the voltage at the anodeof silicon controlled rectifier 20 below ground potential therebyreverse biasing silicon controlled rectifier 20. When silicon controlledrectifier 20 is gated into conductivity by the output from gating source40, the current i drives the cathode of silicon controlled rectifier 1 6more positive than the voltage from source 10 and thereby reverse biasessilicon controlled rectifier 16.

In considering further the operation of this portion of the circuit ofFIG. 1, at startup, with junction 13 initially at ground potential, theoutput of gating source 40 renders silicon controlled rectifier 16conductive and capacitors 12 and 14 charge to a voltage which issomewhat less than twice the supply voltage thus reverse biasing siliconcontrolled rectifier 29 so that it reverts to its blocking state. Aftera time determined by the frequency of the output of gating source 441,silicon controlled rectifier 20 is gated into conductivity and thecapacitors discharge through inductor 18 until the voltage at junction13 falls to a value below ground potential and silicon controlledrectifier 16 is consequently reverse biased. Now, when siliconcontrolled rectifier 16 is again gated into conductivity, the current inthe resonant circuit comprising capacitors 12 and 14 and inductor 18 ishigher since the capacitor voltage is now initially below groundpotential. At the end of this half cycle, the voltage at junction 13 istherefore higher than it was at the end of the immediately precedinghalf cycle. This action continues until a steady state condition isreached and maxi-mum and minimum voltages are provided.

The resonant frequency of the described portion of the circuit normallywith a toad is approximately wherein L is the inductance of one half ofinductor 18 and C is the sum of the capacitances of capacitors 12 and14. When no load is present, the aforesaid resonant frequency becomesapproximately 27r\/LC wherein L has its previous significance andwherein C is the capacitance of capacitor 32 in series with thecombination of capacitors 12 and 14. Accordingly, the presence ofcapacitor 32 permits the circuit to commutate in the absence of a load.In such no load situation,

shorter pulses of current flow through primary winding 24 than duringconditions of load.

When the output voltage across transformer 22 rises because of anincrease in circuit Q, such increase is clipped by diodes 34 and 36.Diodes 34- and 36 return power to source it) when the output voltage ofthe circuit rises above a value determined by the turns'ratios of thewindings of transformer 22.

To limit the voltage across either of silicon controlled rectifiers 16or 20 in the event of a heavy load or the occurrence of a short circuit,Winding 30 is included inductively coupled to center-tapped inductor 18.Thus when the voltage across inductor 18 rises above a value determinedby the turns ratios of the windings of transformer 22, diode 38 conductsto limit the voltage.

From the above it is seen that the inclusion of capacitor 32 enables thecircuit to commutate with no load and the use of winding 30 coupled toinductor 18 together with diode 38 serves to make the circuit short andopen circuit proof.

- The alternating current output of the circuit which is developedacross secondary winding 28 is applied to silicon controlled rectifiers52, 54, 56 and 58. In this connection, it is seen that terminal 29 ofsecondary winding 28 is connected to the anode of silicon controlledrectifier 52 and the cathode of silicon controlled rectifier 54 and thatterminal 27 of secondary winding 28 is connected to the anode controlledrectifier S6 and the cathode of silicon controlled rectifier 553.

In the operation of the portion of the circuit comprising secondarywinding 23 and silicon controlled rectifiers 52, 54, 56 and 58, siliconcontrolled rectifiers 52 and 56 have applied to their respective gateelectrodes a first pulse train which comprises the pulses produced atthe output of transformer 60 during one set of alternately occurringhalf cycles of output from a gating signal source and silicon controlledrectifiers 54 and 58 have applied to their gate electrodes a secondpulse train comprising the pulses produced at the output of transformer63 during the other set of alternately occurring half cycles of outputfrom the gating signal source 95. In this connection,

windings 62 and 66 are secondary windings of a transformer 60 forapplying the first pulse train to silicon controlled rectifiers 52 and56 and windings 64 and 68 are secondary windings of a transformer 63 forapplying the second pulse train to silicon controlled rectifiers 54 and58. The polarity dot designations on the windings comprising atransformer signify common concurrent polarity at their respective dotterminals.

It is seen that silicon controlled rectifier 52 can only be renderedconductive when the voltage at terminal 29 of secondary winding 28 ispositive and a gate pulse is applied to the gate electrode of siliconcontrolled rectifier 52; that silicon controlled rectifier 54 can onlybe rendered conductive when a gating pulse is applied to its gateelectrode and the voltage at terminal 29 is negative; that siliconcontrolled rectifier 56 can only be rendered conductive when the voltageat terminal 27 of secondary winding 28 is positive and a gating pulse isapplied to the gate electrode of silicon controlled rectifier S6; andthat silicon controlled rectifier 58 can only be rendered conductivewhen the voltage at terminal 27 is negative and a gating pulse isapplied to the gate electrode of silicon controlled rectifier 58. Thefrequency of the half cycles from the gating signal source 95 should beappreciably lower than the frequency of the voltage appearing acrosssecondary winding 28.

Thus, considering the first pulse train output of the gating source,during such pulse train, positive gating pulses appear at the gateelectrodes of silicon controlled rectifiers 52 and 56 and half cycles ofoutput of positive polarity having twice the frequency of the voltageacross secondary winding 28 and which are alternately produced bysilicon controlled rectifiers 52 and 56, successively occur at junction55. During the second pulse train output from the gating source,successively occurring half cycles of negative polarity are produced atjunction 55 due to their alternate production by silicon controlledrectifiers 54 and 58. If the gating source signal is a rectangular wave,the output at junction 55 has the configuration as shown in FIG. 2. Thisoutput, when filtered by capacitor 70 is a rectangular wave as shown inFIG. 3. If a variable delay is introduced into the time of occurrence ofgating pulses, then the output at junction 55 has the configurationshown in FIG. 4 and when filtered by capacitor 70, has the configurationshown in FIG. 5.

Thus with this arrangement, the frequency of the output of the inverterportion of the circuit can be converted to an output of lower frequencyand such lower frequency output can have either a rectangular,sinusoidal or any other configuration depending upon the timing of thegating pulses to silicon controlled rectifiers 52, 54, 56 and 58.

The remaining portion of the circuit of FIG. 1 comprises a signalgenerator for producing the gating pulses for silicon controlledrectifiers 52, 54, 56 and 58. In this circuit, a positive supply voltageis provided by diodes '72 and 74 which full wave rectify the voltageappearing across secondary winding 28 and a breakdown diode 76 which maysuitably be a Zener diode acting as a clipper, to which this full waverectified voltage is applied. The rectified and clipped voltageappearing at the cathode of diode 76 and having a frequency twice thatacross the secondary winding 28 because of full wave rectification by 72and 74 is applied as an operating biasing potential to the emitters 82and 102 of transistors 80 and 100 through the respective anode tocathode paths of reverse voltage protection diodes 81 and 101. Intransistor 80, its base 84 is returned to the cathode of diode 76, i.e.,junction 75 through a resistor 90 and is connected to ground through aresistor 92. In transistor 100, its base 104 is connected to junction'75 through a resistor 110 and to ground through a resistor 112.

A signal source 95 whose output has the frequency and configurationdesired for the circuit output is applied to the primary winding 96 of atransformer 94, one terminal 99 of the secondary winding 98 oftransformer 94 being connected to the junction 91 of resistors and 92,the other terminal 97 of secondary winding 98 being connected to thejunction 111 of resistors and 112.

The collector 86 of transistor 80 is connected to ground through acapacitor 88, transistor 80 and capacitor 88 comprising the RC timingcircuit for firing a unijunction transistor 114 which comprises anemitter 116 connected to the junction 87 of collector 86 and capacitor88, a first base 118 connected to junction 75 through a resistor 122 anda second base connected to ground through the primary winding 65 oftransformer 63. The collector 106 of transistor 100 is connected toground through a capacitor 108, transistor 100 and capacitor 108comprising the RC timing circuit for firing a unijunction transistor 124which comprises an emitter 126 connected to the junction 107 ofcollector 106 and capacitor 108, a first base 28 connected to junction'75 through a resistor 132 and a second base connected to ground throughthe primary winding 61 of transformer 60.

In the operation of the signal generator, it is seen that transistor 80which is normally nonconductive in the quiescent state is renderedconductive when the voltage at terminal 99 of winding 98 goes negative.At such time, capacitor 88 charges toward the potential at junction 75until emitter 116 attains the voltage necessary to render unijunctiontransistor 114 conductive whereby a pulse output appears across primarywinding 65, and consequently across secondary windings 64 and 68.Transistor 100 is rendered conductive when the voltage at terminal 97 ofwinding 98 goes negative. At such time, capacitor 108 charges toward thepotential at junction 75 until emitter 126 attains the voltage necessaryto render unijunction transistor 124 conductive whereby a pulse outputappears across primary winding 61 and consequently across secondarywindings 62 and 66.

It is seen that with no input applied to primary winding 96 oftransformer 94, none of silicon controlled rectifiers 52, 54, 56 and 58are gated into conductivity and accordingly no output is produced fromthe circuit. In other words, with no signal input, the delay provided bythe RC combination between the rendering of a transistor such as eithertransistor 80 and 100 conductive and the rendering of its associatedunijunction transistor such as either transistor 114 and 124 conductiverespectively, exceeds 180 of the cycle. This is because 80 isnonconductive in the absence of a signal input. With a positive goinginput signal on primary winding 96, the delay, for example, between therendering of transistor 80 and consequently unijunction transistor 114conductive is decreased and, at a given threshold level of conductivityin transistor 80, is at least less than 180 since capacitor 88 chargesto the firing voltage for unijunction transistor 114 more quickly. Thus,an increase in the amplitude of a positive going signal on primarywinding 96 decreases the delay angle between the rendering conductive ofa transistor and the firing of its associated unijunction transistor anda decrease in such amplitude increases the delay angle. Correspondingly,the extent of the delay between the rendering conductive of a transistorand its associated unijunction transistor varies inversely with theamplitude of a signal appearing on primary winding 96. In the circuit ofFIG. 1, there are included means for providing automatic voltageregulation of the output voltage.

In the block diagram of FIG. 6, high frequency generator stagecorresponds to the inverter portion of the circuit of FIG. 1 whichincludes silicon controlled rectifiers 16 and 20 and their associatedcircuit components, controlled rectifier stage 142 corresponds to theportion of the circuit which includes silicon controlled rectifiers 52,54, 56 and 58 and their associated circuit components, input signalsource 144 includes signal source 95 and transformer 94, signalgenerator 146 corresponds to the portion of the circuit of FIG. 1 whichcomprises transistors 80 and 100 and unijunction transistors 114 and 124and their associated circuit components, and low pass filter stage 148corresponds to capacitor 70. The delay control circuit 150 may suitablybe a reference voltage source wherein a voltage is provided that isproportional to the desired output voltage. Such reference voltage canbe applied to influence the driving voltage to the active devices insignal source 144. Thus, if the active devices in signal source 144 aretransistors, the voltage appearing at the tapped point on a variableresistor 138 (FIG. 1) can be included in a reference bridge network insignal source 95, the reference bridge being so poled that if the outputvoltage falls below a desired level, the output of the bridge increasesthe base drive to these transistors and increases commensurately theamplitude of the output of signal source 95; and if the output voltagerises above the desired level, then the output of the aforementionedbridge is such as to decrease the base drive to the transistors insignal source 95 and thereby commensurately decrease the amplitude ofits output. Since such reference bridge networks are well known in theart, no further detailed description thereof is deemed necessary.

It is to be realized that in the circuit of FIG. 1, when it is used asan inverter, the output voltage therefrom can also be controlled byvarying the frequency produced across transformer 22. Also, the pulsewidths of the output of the inverter can be influenced by the selectionof the values of L and C. Thus, a relatively pure sinusoidal outputhaving the wave shape shown in FIG. 7 can be produced, the frequencythereof being the same as the frequency of gating signals applied to thegate electrodes of silicon controlled rectifiers 16 and 20 or aquasi-sinusoidal output having a lesser frequency can be produced suchas shown in FIG. 8. The pulse widths in these examples are determined bythe values selected for L and C. In this connection, it is readilyappreciated that the output power of the circuit of FIG. 1 decreasesproportionately with a decrease in the frequency of the gating signalsapplied to the gate electrodes'of silicon controlled rectifiers 16 and20. Thus the output voltage of the circuit can also be regulated bysensing the output voltage by means of a variable resistor 136, insteadof by using resistor 138 and stage 150. For example, gating source 40 inthis situation could be a magnetic coupled multivibrator whose outputamplitude is constant within given limits of its supply voltage andwhose frequency depends upon such supply voltage. The sensed outputvoltage taken from resistor 136 could be included in a reference bridgenetwork in stage 40, such bridge arrangement being poled whereby anoutput voltage greater than desired would cause a decrease in the supplyvoltage for the gating source and an output voltage less than thedesired voltage would cause an increase in the supply voltage for thegating source.

The circuit of FIG. 1 can be made to function as a DC). to DC.converter. In such situation only silicon controlled rectifiers 52 and56 would be utilized. In this situation, there would appear at junction55, the full wave rectified voltage from secondary winding 28 and suchvolt age would be filtered in capacitor 7t) to produce a relativelycontinuous unidirectional output.

While there have been shown particular embodiments of this invention, itwill, of course, be understood that it is not wished to be limitedthereto since different modifications may be made both in the circuitarrangements and in the instrumentalities employed, and it iscontemplated in the appended claims to cover any such modifications asfall within the true spirit and scope of the invention.

What is claimed as new and desired to be secured by Letters Patent ofthe United States is:

1. An arrangement for producing an alternating wave having a desiredfrequency comprising a source of unidirectional potential, aself-commutating, gate controlled rectifier means, a first source ofrecurrent gating signals, a first output circuit, said rectifier meansresponsive to said potential and said first signals to become conductiveand produce a first alternating wave in said first output circuit havinga frequency substantially higher than said desired frequency, said firstsiganls gating said rectifier means recurrently into conduction aftersaid rectifier means becomes nonconducting due to its self-commutatingaction, the recurrence rate of said first signals thereby controllingthe nonconducing to conducting time of said rectifier means, means forfull wave rectifying said first wave a second source of recurrent gatingsignals, a second output circuit, a frequency converting, gatecontrolled rectifier means, said frequency converting means responsiveto said first alternating wave, said full wave rectified first wave andsaid second signals to become conductive and produce a secondalternating wave in said second output circuit having said desiredfrequency.

2. An arrangement for producing an alternating wave having a desiredfrequency comprising a source of unidirectional potential, aself-commutating, gate controlled rectifier means, a first source of gating signals having a first frequency which is substantially higherthan said desired frequency, a first output circuit, said rectifiermeans responsive to said potential and said first signals to becomeconductive and produce a first alternating wave in said first outputcircuit having said first frequency, said first signals gating saidrectifier means periodically into conduction after said rectifier meansbecomes nonconducting due to its self-commutating action, the frequencyof said first signals thereby controlling the nonconducting toconducting periods of said rectifier means, means for full waverectifying said first wave, a second source of gating signals havingsaid desired frequency, a second output circuit, a frequency converting,gate controlled rectifier means, said frequency converting meansresponsive to said first alternating wave, said full wave rectifiedfirst wave and said second signals to become conductive and produce asecond alternating wave in said second output circuit having saiddesired frequency and including components of said first frequency, afirst frequency filter for removing said second frequency from said lastnamed wave to provide said desired frequency wave.

3. An arrangement according to claim 2 further comprising meansresponsive to a departure of the amplitude of said desired frequencywave from a given amplitude for deriving a corrective signal, saidfrequency converting, gate controlled rectifier means responsive to saidcorrective signal to change the amplitude of said desired frequency waveto said given amplitude.

4. A circuit for converting the output of a source of unidirectionalpotential to an alternating potential having a desired frequencycomprising an inverter circuit, a switching circuit, sources of firstfrequency and second frequency control signals, the frequency of saidfirst frequency signal being higher than said desired frequency, saidsecond frequency signal having a frequency twice that of said firstfrequency, a source of desired frequency signals, said inverter circuitresponsive to said undirectional potential and said first frequencysignal to produce alternating potential output having said firstfrequency, said switching circuit responsive to said last named outputand to said second frequency and said desired frequency signals to fullwave rectify said first frequency alternating potential output toproduce said alternating potential having said desired frequency.

5. A circuit for converting the output of a source of unidirectionalpotential to an alternating potential having a desired frequencycomprising an inverter circuit having a first output circuit, sources offirst frequency and second frequency control pulses, a source of adesired frequency wave, said first frequency being higher than saiddesired frequency, said second frequency pulses having a frequencyrelated to said first frequency, means for varying the time ofoccurrence of said second pulses in accordance with a characteristic ofsaid desired frequency wave, said inverter circuit responsive to saidunidirectional potential and said first frequency pulses to produce analternating potential output in said first output circuit having saidfirst frequency, a second output circuit, at least one bidirectionalswitching device connected in series between said second output circuitand said first output circuit, said switching device responsive to saidvaried second frequency pulses to switch selected trains of positive andnegative polarity half cycles of said alternating potential in a givensequence from said first output circuit into said second output circuitto produce said alternating potential having said desired frequency.

6. An arrangement according to claim wherein said second frequency isdouble said first frequency and said source of a desired wave comprisesa source of alternating waves having said desired frequency and a givenamplitude characteristic, said varying means responsive to saidalternating waves and said second frequency pulses to produce triggerpulses having a time of occurrence corresponding to the instantaneousamplitude of said wave and occurring at double said first frequency, andmeans for controlling said switching of said switching devices inaccordance with the time of occurrence of said last named triggerpulses.

7. A circuit for converting the output of a uni-directional potentialsource to an alternating current power output having a given frequencycomprising input terminals for applying said potential source output tosaid circuit, a series arrangement connected across said input terminalsof a first pair of gate controlled rectifiers and a first inductordisposed therebetween, a series combination of a pair of capacitorsconnected across said input terminals, an output circuit connectedbetween the junction of said capacitors and an intermediate point onsaid inductor, a third capacitor in shunt with said output circuit,first signal generating means having a first frequency, means forapplying the output of said first signal generating means as gatingsignals to the first and second gate controlled rectifiers of said firstpair of rectifiers to produce an alternating output in said outputcircuit, a second pair of gate controlled rectifiers poled in onedirection, a third pair of gate controlled rectifiers poled in theopposite direction, a load circuit, means for applying said alternatingoutput in one polarity to a gate controlled rectifier of each of saidsecond and ,third pairs and in the opposite polarity to the other gatecontrolled rectifier of each of said second and third pairs, a source ofsecond signals, means for applying said second signals as gating signalsto each of the gate controlled rectifiers of said second and third pairof rectifiers to switch selected trains of positive and negativepolarity half cycles of said alternating output in a given sequence fromsaid output circuit to said load circuit to provide said given frequencyalternating current power.

8. A circuit as defined in claim 7 and further including firstcontrolling means coupled between said output circuit and said inputterminals for preventing said developed output voltage from exceeding achosen level.

9. A circuit as defined in claim 8 wherein said output circuit comprisesa transformer having a primary winding and a plurality of secondarywindings and wherein said first controlling means comprises a pair ofdiodes coupled between one of said input terminals and the respectiveterminals of a first of said secondary windings, and wherein said meansfor applying the alternating output of said output circuit means to saidsecond and third pairs of gate controlled rectifiers is a second of saidsecondary windings.

10. The combination defined in claim 9 wherein said second signalgenerating means is a unijunction transistor relaxation oscillatorhaving an RC combination for determining the time of renderingconductive of the unijunction transistor therein and further includingmeans for combining the outputs of said second pair of gate controlledectifiers, and means for feeding back a portion of said combined output,said fedback portion causing the rendering conductive time of saidunijunction transistor to be advanced when said combined output voltageis less than a chosen value and causing the rendering conductive time ofsaid unijunction transistor to be retarded when said output voltageexceeds said chosen value.

11. The combination defined in claim 10 wherein said first signalgenerating means is an oscillator which provides an output frequencyproportional to the voltage supplied thereto and further including meansfor combining the outputs of said second pair of gate controlled rectifiers, means for feeding back a portion of said combined outputs to saidfirst signal generating means, and means responsive to said fedbackportion for increasing the output frequency of said first signalgenerating means when said combined output voltage is less than a chosenvoltage and for decreasing the output frequency of said first signalgenerating means when said combined output voltage exceeds said chosenvoltage.

12. A circuit as defined in claim 9 and further including secondcontrolling means coupled between said second input terminals and saidinductor for limiting the voltage applied to said first pair of gatecontrolled rectifiers.

13. A circuit as defined in claim 12 wherein said second controllingmeans comprises the series arrangement coupled across said inputterminals of a second inductor coupled to said first inductor and athird diode.

14. A circuit for converting the output of a unidirec' tional potentialsource to an alternating current power output having a given frequencycomprising a series arrangement connected across said source of a firstpair of gate controlled rectifiers and a first inductor disposedtherebetween, a series combination of a pair of capacitors connectedacross said source, a transformer comprising a primary winding connectedbetween the junction of said capacitors and an intermediate point onsaid first inductor and a plurality of secondary windings, a pair ofdiodes respectively in circuit with said source and the terminals of afirst of said secondary windings, the series arrangement connectedacross said source of a second inductor coupled to said first inductorand a third diode, a third capacitor in shunt with said primary winding,first signal generating means having a frequency substantially greaterthan said chosen frequency, means for applying the output of said firstsignal generating means as first gating signals to said first pair ofgate controlled rectifiers, a second pair of gate controlled rectifierspoled in one direction, a third pair of gate controlled rectifiers poledin the opposite direction, a second of said secondary windings forapplying the combined outputs of the gate controlled rectifierscomprising said first pair to a gate controlled rectifier of each ofsaid second and third pairs in one polarity and to the other gatecontrolled rectifier of each of said second and third pairs in theopposite polarity, second signal generating means having said chosenfrequency, means for applying alternate half cycles of the output ofsaid second signal generating means as second gating signals to saidsecond and third pairs of gate controlled rectifiers respectively, meansfor combining the outputs of said second and third pairs of gatecontrolled rectifiers, and means for feeding back a portion of saidcombined outputs to said second signal generating means, the time ofproduction of said second gating signals being retarded when the voltageof said combined outputs exceed a chosen voltage, the time of productionof said second gating signals being advanced when the voltage of saidcombined outputs is less than said chosen voltage.

15. A circuit as defined in claim 14 wherein said second signalgenerating means is a unijunction transistor relaxation oscillatorhaving an RC combination for determining the time of renderingconductive of the unijunction transistor and wherein said feedbackportion affects 1 1 said time in accordance with the value of saidcombined outputs.

16. A circuit for converting the output of a unidirectional potentialsource to an alternating current power output having a given frequencycomprising a series arrangement connected across said source of a firstpair of gate controlled rectifiers and a first inductor disposedtherebetween, a series combination of a pair of capacitors connectedacross said source, a transformer comprising a primary winding connectedbetween the junction of said capacitors and an intermediate point ofsaid inductor and a plurality of secondary windings, a pair of diodesrespectively in circuit with said source and the terminals of -a firstof said secondary windings, the series arrangement connected across saidsource of a second inductor coupled to said first inductor and a thirddiode, a third capacitor in shunt with said primary winding, firstsignal generating means having a frequency substantially greater thansaid chosen frequency, means for applying the output of said firstsignal generating means as gating signals to said first pair of gatecontrolled rectifiers, a second pair of gate controlled rectifiers poledin one direction, a third pair of gate controlled rectifiers poled inthe opposite direction, a second of said secondary windings for applyingthe combined outputs of the gate controlled rectifiers comprising saidfirst pair to a gate controlled rectifier of each of said second andthird pairs in one polarity and to the other gate controlled rectifierof each of said second and third pairs in the opposite polarity, secondsignal generating means having said chosen frequency, and meansresponsive to alternate half cycles of the output of said second signalgenerating means to provide gating signals to said second and thirdpairs of gate controlled rectifiers respectively.

17. A circuit as defined in claim 18 wherein said first signalgenerating means is an oscillator which provides an output having afrequency proportional to the voltage supplied thereto and furtherincluding means for combining the outputs of'said second and third pairsof gate controlled rectifiers, means for feeding back a portion of saidcombined outputs to said first signal generating means and meansresponsive to said fedback portion for increasing the output frequencyof said first signal generating means when the voltage of said combinedoutputs is less than a chosen voltage and for decreasing the outputfrequency of said first signal generating means when the voltage of saidcombined outputs exceeds said chosen voltage.

18. In combination with a unidirectional potential source, a DC. to AC.converter comprising a series arrangement connected across said sourceof a first pair of gate controlled rectifiers and a first inductordisposed therebetween, a series combination of a pair of capacitorsconnected across said source, a transformer comprising a primary windingconnected between the junction of said capacitors and an intermediatepoint of said first inductor and a plurality of secondary windings, apair of diodes respectively in circuit with said source and theterminals of a first of said secondary windings, the series arrangementconnected across said source of a second inductor coupled to said firstinductor and a third capacitor in shunt with said primary winding, firstsignal means generating means having a first output frequency, means forapplying the output of said first signal generating means as gatingsignals to said first pair of gate controlled rectifiers, a second pairof similarly poled gate controlled rectifiers, a second of saidsecondary windings for applying the combined outputs of the gatecontrolled rectifiers comprising said first pair to each of the gatecontrolled rectifiers comprising said second pair in opposite polaritiesrespectively, second signal generating means having a second frequencysubstantially less than said first frequency, and means responsive toalternate half cycles of the output of said second signal generatingmeans to provide gating signals to each of said second pair of gatecontrolled rectifiers respectively.

19. A circuit for converting the output of an alternating current powersource to an alternating current power output having a selectivelyvariable waveshape and a frequency substantially less than the frequencyof said source output comprising a first pair of gate controlledrectifiers poled in one direction, a second pair of gate controlledrectifiers poled in the opposite direction, means for applying theoutput of said source in one polarity to a gate controlled rectifier ofeach pair and in the opposite polarity to the other gate cont-rolledrectifier of each pair, signal generating means having said lesserfrequency and means responsive to alternate half cycles of the output ofsaid last named means to supply gating signals to said first and secondpairs of gate controlled rectifiers respectively comprising means forselectively varying the time of application of said last mentionedgating signals.

20. A circuit for converting the output of unidirectional potentialsource to an alternating current power output having a given waveshapeand frequency comprising input terminals for applying said potentialsource output to said circuit, a series arrangement connected acrosssaid input terminals of a first pair of gate controlled rectifiers andan inductor disposed therebetween, a series combination of a pair ofcapacitors connected across said source, means for developing an outputconnected between the junction of said capacitors and said inductor, athird capacitor in shunt with said output developing first signalgenerating means having a first frequency, means for applying the outputof said last named means as gating signals to said first pair of gatecontrolled rectifiers, first gate controlled rectifying means poled inone direction, second gate controlled rectifying means poled in theopposite direction, means for applying the output from said outputdeveloping means in opposite polarities to said first and second gatecontrolled rectifying means respectively, second signal generating meanshaving an output frequency substantially less than the frequency of theoutput of said first signal generating means, means responsive toalternate half cycles of the output of said second signal generatingmeans to supply gating signals to said first and second gate controlledrectifying means respectively comprising means for selectively varyingthe time of application of said last mentioned gating signals inaccordance with said given output waveshape.

References Cited by the Examiner UNITED STATES PATENTS 4/1964 Reinert32145 X 4/ 1966 Clarke 32l---69 OTHER REFERENCES JOHN F. COUCH, PrimaryExaminer.

W. H. BEHA, Assistant Examiner.

1. AN ARRANGEMENT FOR PRODUCING AN ALTERNATING WAVE HAVING A DESIREDFREQUENCY COMPRISING A SOURCE OF UNIDIRECTIONAL POTENTIAL, ASELF-COMMUTATING, GATE CONTROLLED RECTIFIER MEANS, A FIRST SOURCE OFRECURRENT GATING SIGNALS, A FIRST OUTPUT CIRCUIT, SAID RECTIFIER MEANSRESPONSIVE TO SAID POTENTIAL AND SAID FIRST SIGNALS TO BECOME CONDUCTIVEAND PRODUCE A FIRST ALTERNATING WAVE IN SAID FIRST OUTPUT CIRCUIT HAVINGA FREQUENCY SUBSTANTIALLY HIGHER THAN SAID DESIRED FREQUENCY, SAID FIRSTSIGNALS GATING SAID RECTIFIER MEANS RECURRENTLY INTO CONDUCTION AFTERSAID RECTIFIER MEANS BECOMES NONCONDUCTING DUE TO ITS SELF-COMMUTATINGACTION, THE RECURRENCE RATE OF SAID FIRST SIGNALS THEREBY CONTROLLINGTHE NONCONDUCING TO CONDUCTING TIME OF SAID RECTIFIER MEANS, MEANS FORFULL WAVE RECTIFYING SAID FIRST WAVE A SECOND SOURCE OF RECURRENT GATINGSIGNALS, A SECOND OUTPUT CIRCUIT, A FREQUENCY CONVERTING, GATECONTROLLED RECTIFIER MEANS, SAID FREQUENCY CONVERTING MEANS RESPONSIVETO SAID FIRST ALTERNATING WAVE, SAID FULL WAVE RECTIFIED FIRST WAVE ANDSAID SECOND SIGNALS TO BE-